摘要：

With the second generation of the Carmel core about to become available as soft or hard IP, and a third generation planned for next year, Infineon 's remains the only digital signal processor on the market to use what it describes as a configurable long instruction word (cliw) architecture. Unlike very long instruction word architectures, Carmel includes single instruction multiple data (simd) too, a feature usually only seen on microprocessors such as Pentium and AltiVec. The main difference from other vliw or simd architectures though, is that Carmel is explicitly designed to be part of an asic, and not a standalone 'general purpose' dsp. It can be designed for specific applications and the second generation has been extended further, to provide additional functional elements to take this focused performance higher.

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